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EMC basics for SiC/GaN switching: What changed vs. IGBT

 Rows of through-hole power transistors in TO-247 style packages

For some time in the 2010s, it was found that IGBTs were a good option for replacing power MOSFETs in power electronics, specifically in high-power applications where fast switching is not desired. MOSFETs are known for their fast switching characteristics; this is great for logic and for quickly switching on power to peripherals, low/moderate-power loads, and many other circuits.

Over the past several years, SiC and GaN transistors (and GaN-on-SiC) have become a go-to solution for high power density as a better alternative to IGBTs. While IGBTs are still manufactured and sold at high volume, newer systems increasingly rely on GaN or SiC for power handling and delivery in high-voltage and high-power systems. Ultimately, there will be an impact on EMC when changing from IGBTs to SiC or GaN FETs, and this is what we will examine in this article.

 

Where IGBTs became inadequate

Before diving into the EMC implications of GaN and SiC FETs, it's worth asking: where exactly did IGBTs become inadequate, and how did GaN/SiC FETs overcome those problems?

IGBTs are still widely used today, and they can provide higher power handling and higher voltages than power MOSFETs of the same size/package. While power MOSFETs are highly capable in terms of power dissipation, they have difficulty providing reliable power handling at high voltage and high current simultaneously. The result is that many MOSFETs would be put in parallel to provide the required power handling; IGBTs have higher voltage ratings in general and can provide higher power levels without paralleling.

Because of the internal structure of IGBTs, they effectively combine a typical FET gate structure with a bipolar conduction channel. The result is a slower turn-on time than a power MOSFET driven with the same driving pulse. While beneficial for high-voltage designs at low current, this is less desirable when high-current pulses need to be generated from a high-voltage source.

SiC and GaN devices provide the same power handling levels as IGBTs but with faster turn-on, making them a better option for power delivery at high voltage and high current. The faster turn-on time provides lower switching losses; however, SiC and GaN provide those lower losses at higher voltage than a typical low-RDS(on) power MOSFET.

Parameter Silicon power MOSFET IGBT SiC FET GaN FET
Common high-voltage range Up to several hundred volts, with higher-voltage parts available Common at 600 V to several kV Common at 650 V, 1200 V, 1700 V, and higher Commonly 650 V class
Switching speed Fast Slow to moderate Very fast Extremely fast
Switching losses Increase significantly at higher voltage High at elevated switching frequency Low at high voltage Very low at high switching frequency
Practical switching frequency Moderate to high Low to moderate High Very high
Reverse-recovery behavior Body-diode reverse recovery Antiparallel diode dependent Much lower than typical silicon MOSFETs No conventional body diode

 

Where EMC risks arise in SiC and GaN power stages

With the most important difference between SiC and GaN being their faster switching capability compared to IGBTs, the major EMC risks are related to that fast switching speed, especially when delivering power from a high-voltage bus. We have identified a few important areas below.

High dV/dt switch nodes

The conventional wisdom in power electronics, particularly at high currents, is that more copper is generally better, as it reduces IR loss and helps manage overall board temperature. In a high-voltage system, a physically large piece of copper at the switching node is actually a potential path for common-mode currents, and that includes GaN or SiC switching stages.

Consider the simple bridge circuit with a DC bus shown below:

Half-bridge circuit with a DC bus capacitor, high-side and low-side FETs with gate drives, and the switch node between them

SiC and GaN FETs could have switching rates up to 100 V/ns or higher, whereas with an IGBT, that transition might take tens or hundreds of nanoseconds. This aggressive switching behaviour means the switch-node geometry should be intentionally minimised, rather than simply made as large as possible for the current-carrying capability. In some reference designs, you will see small traces used as the high-voltage switch node shown above, with an external heat sink making contact with the trace to reduce heat.

Large voltage overshoot

When GaN/SiC devices are switching at high voltage, a small inductance can create large voltage overshoots. The relevant inductance here is given by the path between DC bus capacitors and the FET switchers. To reduce the voltage overshoot that can result from the DC bus capacitors interacting with trace inductance, place enough capacitance close to the switchers to provide fast discharge with minimal inductance.

Slow down the FETs

Although SiC/GaN FETs can switch extremely quickly, and this is generally the best option from an efficiency perspective, a slower switching speed may be needed in order to pass EMC. This means you may have to accept some losses and allow for a slower slew rate at the switch node in a driver circuit. The correct switching speed is the speed that produces the best system-level compromise between switching loss, overshoot/ringing, common-mode current, and emissions margin.

There are gate drivers that are specialized for either SiC or GaN, and some of these can provide control over turn-on and turn-off rates. This gives the most flexibility for balancing power conversion efficiency against EMC demands while only making the system marginally more complex. If a suitable gate driver does not provide this level of control, switching can be slowed down by:

  • Increase gate resistance to lower peak current and slow switching.
  • Use separate turn-on and turn-off resistors with a steering diode for independent edge adjustment.
  • Add gate-source capacitance to increase the charge required for switching.
  • Choose a gate driver with lower current or programmable drive strength.

Qualify your SiC/GaN-based system before testing

While this is not an exhaustive list of functional or EMC problems in SiC and GaN switching stages, it covers the failure modes that tend to have the simplest solutions. Before EMC testing, measure switch-node slew rate, voltage overshoot, ringing, and gate behavior across the expected DC bus voltage and load range. These measurements provide an opportunity to adjust the gate drive, local DC bus capacitance, snubbers, or switching-node geometry before emissions testing exposes the same problems at the system level.

 

Qualify your design before you book the lab

If you want expert eyes on your high-voltage layout before you commit to a lab booking, DENPAFLUX can help. Our EMC experts review your design (the PCB, the wider system, and your test results) and hand back a clear report that flags what to change and how urgent each issue is. You choose how much of the EMC work we take on, from an advisory review through to owning the full path to a passing test.

See how we work or contact an expert to get started.

 

 

 

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