EMC problems can be very complex to diagnose and solve, which is why so much money and effort are spent on simulation, rounds of testing, and hiring consultants. There are a number of reasons a design team can end up struggling to achieve EMC compliance. Sometimes it is simply a lack of experience, while other times it comes down to clinging to outdated design practices.
Whatever the reason, design teams end up with EMC problems; there are certainly signs that a problem is on the horizon. In a recent webinar presented for DENPAFLUX, Zachariah Peterson shared some statements he's heard from designers and engineering managers, and these are reliable indicators that a product may soon have an EMC problem. This blog elaborates on why those statements reveal a misunderstanding of system behavior and unrecognized EMC risk.
If you hear an engineer or engineering manager make one of the following statements, don't be surprised when their product ends in compliance failure.
Sign #1
Component datasheets for integrated circuits and some discrete semiconductors are intended to provide circuit design guidance and information on the functions contained in a chip. In some cases, there will be PCB layout guidance, and it is important to understand where that guidance actually comes from.
In many cases, the guidance in component datasheets typically originates from two sources:
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Copy and pasted guidelines from decades in the past, or from other unrelated component datasheets
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The layout guidance comes from the development board for the component
Designers should note that the layout guidance is rarely tested outside of the development board, and development boards almost never match real system conditions. The companies that publish the layout guidance will also never provide a guarantee that following it will ensure a system is free of SI, PI, or EMI problems.
This is because PCB layouts are far more complex than what is found in a datasheet or development board. It integrates disparate circuit types and functions and requires consideration of the enclosure, cabling, connectors, stackup design, and how the rest of the board couples energy into the outside world. Even when the advice is technically correct, it is usually incomplete because the IC vendor does not know your specific layer count, board size, cable set, mounting scheme, power entry, or mechanical packaging.
Sign #2
This statement ignores both the regulatory reality and the entire point of EMC. Small companies sometimes convince themselves they can ignore EMC because they are building prototypes, pilot runs, or specialty equipment. While there are prototype exemptions for EMC certification, every product will need to be certified in order to be offered for sale to the public or deployed in the field in certain industries.
Companies should take time to learn about the regulations that apply to their product and industry before concluding that EMC certification does not apply to them.
Sign #3
Shielded cabling does not prevent conducted emissions, nor does it guarantee immunity. In fact, a common EMC failure mode is when the shield on a cable becomes part of a current loop, creating strong radiated emissions.
Instead of assuming shielded cable will always make the system better from an EMC perspective, some simple testing is needed to verify that the shield is actually necessary and useful. In some cases, it is quickly found that the system is only compliant when cable shielding is removed entirely.
Sign #4
Ferrites, chokes, and any other inductive component or circuit remove both noise and signal in some frequency range by creating a high impedance. In cases where the signal is at a much lower frequency than the noise, the use of a ferrite bead is appropriate.
A common usage of ferrite beads is to isolate digital and analog power rails. However, this should always be tested to confirm it does not increase transient noise observed on the analog pin.
There is an area where many designers fail to understand the role of ferrite beads: digital power for fast I/Os. If we try to suppress transient noise on a digital power rail by adding a ferrite, the ferrite blocks the power that the chip demands in order to source signal from fast digital I/Os. Furthermore, by interacting with the capacitors on the same rail, the ferrite bead creates a new transient response at a frequency where such a response did not exist previously. In this way, the ferrite bead actually increases noise.
This is another instance where the use of a ferrite is typically disproven to provide benefit, or where it needs to be tested in pre-compliance to prove its usefulness for noise suppression.
Sign #5
A very common practice among new designers is to pour copper on all unused areas on all layers, with EMC often cited as the main reason. The logic states that any time you add ground around signals, there will be less radiation.
The reality is that a grounded copper pour is only useful in two situations:
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In 2-layer PCBs with a low density of components and traces
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When the distance between the signal and ground layers is large (greater than ~10 mil / 0.25 mm)
As simulation results from experts have consistently shown, grounded copper pour either creates signal integrity problems or shows no benefit whatsoever.
Sign #6
This is one of the most persistent misunderstandings in mixed-signal design. Splitting ground does not make noise disappear. It changes where current has to flow, and if signals or power currents need to cross that split, you have just forced return current to find another path, leading to radiation and higher susceptibility.
There is also the fact that two grounds at different potentials can oscillate with respect to each other, and this is exactly what happens in physically disconnected ground nets. The result is the creation of a dipole antenna with a virtual ground between them. Signal coupling onto the ground regions can lead to radiation, as well as higher susceptibility, at specific frequencies.
Sign #7
Firmware can help with some problems, but it cannot undo Maxwell's equations. Firmware gives some control over application behavior and signal behavior, but that is it. If the hardware gives current an efficient way to radiate, code updates only move the symptom around unless they substantially change the system's electrical behavior.
Sign #8
Pre-certified modules do not automatically transfer their certification to a larger system. Designers will recognize this by reading the module certification requirements in FCC, CE, and other regulations.
This ESP8266 module is pre-certified, but only under the conditions matching the compliance lab’s testing process.
A radio module may have been demonstrated to be compliant on a specific reference carrier board, in a specific enclosure condition, with a specific antenna, power supply, cable arrangement, and grounding scheme. Custom products that use modules never match the test conditions used to achieve the module certification. Because EMC arises at the system level, the host product still has to be evaluated in testing as an assembled system.
Sign #9
This statement reflects a failure to recognize that parasitic capacitance can lead to conducted emissions. Parasitic capacitance exists between traces, planes, cable conductors, shields, heatsinks, enclosures, and any other conductors separated by a dielectric. Unintended capacitances create real current paths, allowing noise currents to travel through unanticipated paths.
The result is the coupling of noise currents into and out of a PCB via cabling, currents moving in loops via large metal objects such as the enclosure, or currents appearing in a circuit where they were not intended. They can couple switching noise into chassis metal, inject common-mode current onto cables, bypass intended filters, and change the resonant behavior of the product in ways that are completely invisible in a simplified circuit diagram. Once designers start thinking in terms of parasitic capacitance and parasitic inductance, many "mystery" EMC problems suddenly become explainable.
The above list of PCB design statements is a good starting point, but there is much more to understand about EMC and planning early for compliance. To go deeper, watch the on-demand webinar:
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Avoiding the mistakes above requires more than good intentions. PCB layouts are complex systems where SI, PI, and EMC interact in ways that are easy to overlook without the right analysis tools and expertise. That is why engineering teams working under tight timelines and compliance pressure work with specialized EMC partners for design guidance.
DENPAFLUX provides on-demand EMC expertise for hardware teams. Based on an analysis of design files and product specifications, DENPAFLUX EMC experts can identify and recommend solutions to complex EMI challenges in PCB layouts, across industries, regional regulations, and industry standards.